STM32的ADC采样和DAM配置
Adc_Init();
My_DMA_Config (DMA1_Channel1,(u32)&ADC1->DR,(u32)& ADC1_Value,ADC_CHANNEL_NUM*ADC_C_VAL_TIMES );
DMA_Cmd ( DMA1_Channel1, ENABLE );
ADC_SoftwareStartConvCmd ( ADC1, ENABLE );
void Adc_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
ADC_InitTypeDef ADC_InitStructure;
RCC_APB2PeriphClockCmd ( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |RCC_APB2Periph_GPIOC| RCC_APB2Periph_ADC1 | RCC_APB2Periph_AFIO, ENABLE );
RCC_ADCCLKConfig ( RCC_PCLK2_Div6 );
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 |GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3| GPIO_Pin_6| GPIO_Pin_7 ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init ( GPIOA, &GPIO_InitStructure );
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init ( GPIOB, &GPIO_InitStructure );
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2|GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init ( GPIOC, &GPIO_InitStructure );
ADC_DeInit ( ADC1 );
ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfChannel = ADC_CHANNEL_NUM;
ADC_Init ( ADC1, &ADC_InitStructure );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_0, 1, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_1, 2, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_2, 3, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_3, 4, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_6, 5, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_7, 6, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_9, 7, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_10, 8, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_11, 9, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_12, 10, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_13, 11, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_14, 12, ADC_SampleTime_239Cycles5 );
ADC_RegularChannelConfig ( ADC1, ADC_Channel_15, 13, ADC_SampleTime_239Cycles5 );
ADC_DMACmd ( ADC1, ENABLE );
ADC_Cmd ( ADC1, ENABLE );
ADC_ResetCalibration ( ADC1 );
while ( ADC_GetResetCalibrationStatus ( ADC1 ) );
ADC_StartCalibration ( ADC1 );
while ( ADC_GetCalibrationStatus ( ADC1 ) );
}
void My_DMA_Config ( DMA_Channel_TypeDef *DMA_CHx, u32 cpar, u32 cmar, u16 cndtr )
{
DMA_InitTypeDef DMA_InitStructure;
RCC_AHBPeriphClockCmd ( RCC_AHBPeriph_DMA1, ENABLE );
DMA_DeInit ( DMA_CHx );
DMA_InitStructure.DMA_PeripheralBaseAddr = cpar;
DMA_InitStructure.DMA_MemoryBaseAddr = cmar;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
DMA_InitStructure.DMA_BufferSize = cndtr;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
DMA_Init ( DMA_CHx, &DMA_InitStructure );
}
void ADC_Convert_val()
{
u8 i, j;
memset((u8*)ADC1_Value_SUM,0x00,sizeof(ADC1_Value_SUM));
for(i=0;i<ADC_CHANNEL_NUM;i++)
{
for(j=0;j<ADC_C_VAL_TIMES;j++)
{
ADC1_Value_SUM[i] += ADC1_Value[j][i];
}
}
for(i=0;i<ADC_CHANNEL_NUM;i++)
{
ADC1_Value_reg[i]=ADC1_Value_SUM[i]/ADC_C_VAL_TIMES;
ADC1_Value_Vol[i] = ADC1_Value_reg[i] *ADC_REF_V / ADC_MAX_NUM;
}
}