RISC-V知识点目录

发布于：2024-10-12 ⋅ 阅读:(138) ⋅ 点赞:(0)

分支预测

分支预测概述icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/136947089?sharetype=blogdetail&sharerId=136947089&sharerefer=PC&sharesource=zhangshangjie1&spm=1011.2480.3001.8118分支指令的方向预测icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135261303分支预测的地址跳转icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/139169767分支预测失败的处理icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134964464超标量处理器中的分支预测实现icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/137681183TAGE predictoricon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/140291542

TAGE-SC-L predictoricon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/142791925?spm=1001.2014.3001.5501

TAGE-SC分支预测器icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/142824078?spm=1001.2014.3001.5502

指令集体系

指令集体系简读icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/137681854RISCV指令集体系简读之RV32Iicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/137792240RISCV指令集体系简读之RV32Micon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/137794084

decode

超标量之指令解码_指令集解码icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/138484616

rename

处理器的状态管理icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134942507处理器中的几种hazardicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/142755074

rename--统一的PRFicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134839027rename--超标量处理器的实现icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134840126rename--恢复流程icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134851171rename--一些例子与问题icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134849671Rename--CAM在checkpoint恢复上的流程与优势icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134850744

 ISSUE

ISSUE的基本概念_cpu issueicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135022058发射过程中的流水线icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135058018issue queue的实现方式icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135022410issue阶段的选择电路的实现icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135059098超标量处理器的唤醒icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135062260唤醒阶段的推测唤醒(1)icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135064162唤醒阶段的推测唤醒(2)icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135080169issue uniticon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134987790

Execution

execution unit的概念与实现----BRU_branch uniticon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134920891execution unit的概念与实现----ALUicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134922342execution unit的概念与实现----AGUicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134923028LSU介绍icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134923571处理器中store指令的处理icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134968473

Commit 

ROB的结构与作用icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134934552ROB&dispatch stageicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134957062ROB端口需求icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134941707

Exception & Interrupt

处理器中异常的处理icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134965392riscv中的异常简介icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135123640Excp/Trap/Int的一些简单说明icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135413348TRAP概念及流程简介icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135000648处理器中断的处理icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134967330Machine Interrupt Registersicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135544363Machine Trap Delegation Registersicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135548720Machine Mode下的Excp处理icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/142764415

 特权架构

RV32/64 特权架构icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134974656risc-v system instructionicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135003940

VECTOR

RISC-V vector(1) --- vector的引入与register说明icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/141459803

 浮点运算

浮点数的加法运算icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/137920540浮点数的乘法处理icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/138808445浮点数的转换--IEEE 754icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135204585

MISC

经典5级流水线概述icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/142759726Mtime&Mtimecmpicon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135595319处理器类型简介icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/135214846RISCV中的寄存器操作icon-default.png?t=O83Ahttps://blog.csdn.net/zhangshangjie1/article/details/134996405

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